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Controller area network (bxCAN)
RM0008
Figure 200. Filter bank scale configuration - register organization
Filter
One 32-Bit Filter - Identifier Mask
Num.
ID
Mask
CAN_FxR1[31:24]
CAN_FxR2[31:24]
CAN_FxR1[23:16]
CAN_FxR2[23:16]
CAN_FxR1[15:8]
CAN_FxR2[15:8]
CAN_FxR1[7:0]
CAN_FxR2[7:0]
n
Mapping
STID[10:3]
STID[2:0]
EXID[17:13]
EXID[12:5]
EXID[4:0]
IDE RTR
0
Two 32-Bit Filters - Identifier List
ID
ID
CAN_FxR1[31:24]
CAN_FxR2[31:24]
CAN_FxR1[23:16]
CAN_FxR2[23:16]
CAN_FxR1[15:8]
CAN_FxR2[15:8]
CAN_FxR1[7:0]
CAN_FxR2[7:0]
n
n+1
Mapping
STID[10:3]
STID[2:0]
EXID[17:13]
EXID[12:5]
EXID[4:0]
IDE RTR
0
Two 16-Bit Filters - Identifier Mask
ID
Mask
ID
Mask
Mapping
CAN_FxR1[15:8]
CAN_FxR1[31:24]
CAN_FxR2[15:8]
CAN_FxR2[31:24]
STID[10:3]
CAN_FxR1[7:0]
CAN_FxR1[23:16]
CAN_FxR2[7:0]
CAN_FxR2[23:16]
STID[2:0] RTR IDE EXID[17:15]
n
n+1
Four 16-Bit Filters - Identifier List
ID
ID
ID
ID
Mapping
CAN_FxR1[15:8]
CAN_FxR1[31:24]
CAN_FxR2[15:8]
CAN_FxR2[31:24]
STID[10:3]
CAN_FxR1[7:0]
CAN_FxR1[23:16]
CAN_FxR2[7:0]
CAN_FxR2[23:16]
STID[2:0] RTR IDE EXID[17:15]
n
n+1
n+2
n+3
x = filter bank number
ID=Identifier
1
2
These bits are located in the CAN_FS1R register
These bits are located in the CAN_FM1R register
Filter match index
Once a message has been received in the FIFO it is available to the application. Typically,
application data is copied into SRAM locations. To copy the data to the right location the
application has to identify the data by means of the identifier. To avoid this, and to ease the
access to the SRAM locations, the CAN controller provides a Filter Match Index.
This index is stored in the mailbox together with the message according to the filter priority
rules. Thus each received message has its associated filter match index.
The Filter Match index can be used in two ways:
●
●
Compare the Filter Match index with a list of expected values.
Use the Filter Match Index as an index on an array to access the data destination
location.
For non-masked filters, the software no longer has to compare the identifier.
If the filter is masked the software reduces the comparison to the masked bits only.
The index value of the filter number does not take into account the activation state of the
filter banks. In addition, two independent numbering schemes are used, one for each FIFO.
Refer to Figure 201 for an example.
554/995
Doc ID 13902 Rev 9
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